VerilogEval-Machine

Papers using VerilogEval-Machine (5)

CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair2024 · 1 citesEvoVerilog: Large Langugage Model Assisted Evolution of Verilog Code2025VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation2025Insights from Verification: Training a Verilog Generation LLM with Reinforcement Learning with Testbench Feedback2025RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solution2023 · 9 cites