VerilogEval-Human
Emerging11papers using it
2024first seen
The 'VerilogEval-Human' dataset/benchmark contains human-annotated Verilog code examples used to evaluate the functional correctness of Verilog code generated by large language models.
Papers using VerilogEval-Human (11)
- VRank: Enhancing Verilog Code Generation from Large Language Models via Self-ConsistencyInsights from Verification: Training a Verilog Generation LLM with
Reinforcement Learning with Testbench FeedbackCraftRTL: High-quality Synthetic Data Generation for Verilog Code Models
with Correct-by-Construction Non-Textual Representations and Targeted Code
RepairVFocus: Better Verilog Generation from Large Language Model via Focused ReasoningEvoVerilog: Large Langugage Model Assisted Evolution of Verilog CodeReasoningV: Efficient Verilog Code Generation with Adaptive Hybrid
Reasoning ModelITERTL: An Iterative Framework for Fine-tuning LLMs for RTL Code GenerationOriGen:Enhancing RTL Code Generation with Code-to-Code Augmentation and
Self-ReflectionVerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning
and Abstract Syntax Tree (AST)-based Waveform Tracing ToolAIvril: AI-Driven RTL Generation With Verification In-The-LoopEDA-Aware RTL Generation with Large Language Models