RTLLM v-2

RTLLM v-2 is a benchmark used to evaluate the performance of large language models in generating and optimizing Verilog code for hardware design tasks.

Papers using RTLLM v-2 (3)

Insights from Verification: Training a Verilog Generation LLM with Reinforcement Learning with Testbench Feedback2025 · 1 citesSiliconMind-V1: Multi-Agent Distillation and Debug-Reasoning Workflows for Verilog Code Generation2026EvolVE: Evolutionary Search for LLM-based Verilog Generation and Optimization2026