Abstract
Hole spins in Ge/SiGe heterostructure quantum dots have emerged as promising qubits for quantum computation. The strong spin-orbit coupling (SOC), characteristic of heavy-hole states in Ge, enables fast and all-electrical qubit control. However, SOC also increases the susceptibility of spin qubits to charge noise. While qubit coherence can be significantly improved by operating at sweet spots with reduced hyperfine or charge noise sensitivity, the latter ultimately limits coherence, underlining the importance of understanding and reducing charge noise at its source. In this work, we study the voltage-induced hysteresis commonly observed in SiGe-based quantum devices and show that the dominant charge fluctuators are localized at the semiconductor-oxide interface. By applying increasingly negative gate voltages to Hall bar and quantum dot devices, we investigate how the hysteretic filling of interface traps impacts transport metrics and charge noise. We find that the gate-induced accumul