Abstract
Achieving densely connected hardware graphs is a challenge for most quantum computing platforms today, and a particularly crucial one for the case of quantum annealing applications. In this context, we present a scalable architecture for quantum annealers to realize effective Ising Hamiltonians of arbitrary connectivity. Our proposal consists on a resource-efficient configuration based on a hardware graph where physical qubits are connected to at most other 3 and containing exclusively 2-local interactions. We derive this configuration based on chains of qubits encoding logical variables by describing the problem graph in terms of triangles. We thus present a promising new route to scale up devices dedicated to classical optimization tasks within the quantum annealing paradigm.